# PCB1 — Parameter Block Encoding (FCS/1)

Status: Approved
Owner: Architecture
Version: 1.0.0
SoT: Yes
Last Updated: 2026-02-21
Linked Phase Pack: PH07
Tags: [execution, parameters, deterministic]

**Document ID:** `PCB1`
**Layer:** L2 — Parameter block encoding for FCS/1 descriptors

**Depends on (normative):**

* `DDS` — PCB1 envelope and TLV layout (DDS §7.3)
* `ASL/1-CORE v0.4.x` — logical value model

---

## 0. Purpose & Scope

`PCB1` defines a **deterministic, canonical** encoding for parameter blocks used
by `FCS/1` descriptors. It standardizes slot manifests, slot data ordering, and
arity validation.

---

## 1. Logical Model

A PCB1 parameter block is a two-part payload:

```
PCB1 {
  slot_manifest : list<Slot>
  slot_data     : bytes
}

Slot {
  index  : uint32
  name   : string
  type   : enum
  digest : bytes[32]
}
```

Slots MUST appear in ascending `index` order. The `slot_data` is a packed byte
sequence that respects the manifest ordering.

---

## 2. Canonical Encoding

The canonical byte encoding is defined by DDS §7.3:

* COR/1 envelope with `MAGIC="PCB1"`, `VERSION=0x01`, `FLAGS=0x00`.
* Strict TLV order; no padding.
* Required TLVs:
  * `slot_manifest (0x50)` — BCF/1 list of slot descriptors.
  * `slot_data (0x51)` — packed bytes aligned with the manifest.

---

## 3. Validation Rules

Implementations MUST reject PCB1 payloads that violate any of the following:

1. TLVs are not in strict ascending order, or appear more than once.
2. `slot_manifest` entries are not sorted by `index`.
3. Slot digest mismatches (`ERR_PCB_DIGEST_MISMATCH`).
4. Non-deterministic or duplicated manifest ordering (`ERR_PCB_MANIFEST_ORDER`).
5. Arity mismatch between PCB1 slot count and the enclosing FCS/1 descriptor
   (`ERR_PCB_ARITY_MISMATCH`).

---

## 4. Conformance

An implementation is **PCB1–conformant** if it:

* Emits the exact canonical encoding in DDS §7.3.
* Enforces the validation rules in §3.